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Micrel, Inc.
3.3V/5V PECL/ECL 3GHz DUAL DIFFERENTIAL 2:1 MULTIPLEXER
ECL ProTM SY100EP56V ECL ProTM SY100EP56V
FEATURES
Dual, fully differential 2:1 PECL/ECL multiplexer Guaranteed AC parameters over temperature/ voltage: * > 3GHz fMAX (toggle) * < 100ps within device skew * < 230ps rise/fall times * < 500ps propagation delay Flexible power supply: 3.0V to 5.5V Wide operating temperature range: -40C to +85C VBB reference for AC-coupled and single-ended applications Both channels have independent input select or common select control 100k PECL/ECL compatible logic Available in 20-pin TSSOP package
ECL ProTM
DESCRIPTION
The SY100EP56V is a high-speed, low-skew, fully differential Dual PECL/ECL 2:1 multiplexer. This device is a pin-for-pin, plug-in replacement to the MC10/100EP56DT. Two separate 2:1 multiplexers (Channel 0 and Channel 1) with dedicated select control pins (SEL0 and SEL1) are implemented in a 20-pin TSSOP package. The signal-path inputs (D0a, D0b and D1a, D1b) accept differential signals as low as 150mV pk-pk. For applications that require common select control for both channels A & B, a common select pin (COM_SEL) is available. All I/O pins are 100k PECL/ECL logic compatible. AC-performance is guaranteed over the industrial -40C to +85C temperature range and 3.0V to 5.5V supply voltage range. This device will operate in PECL/LVPECL or ECL/ LVECL mode. The 500ps max (400 typ) propagation delay is matched for all signal and logic select paths: D-to-QOUT, SEL-to-QOUT, and COM_SEL-to-QOUT. Two VBB output reference pins (approx equal to VCC -1.4V) are available for AC-coupled or single-ended applications. The SY100EP56V is part of Micrel's high-speed, Precision Edge timing and distribution family. For applications that require a different I/O combination, consult the Micrel website at www.micrel.com, and choose from a comprehensive product line of high-speed, low skew fanout buffers, translators, and clock dividers.
CROSS REFERENCE TABLE
Micrel Semiconductor SY100EP56VK4I SY100EP56VK4ITR ON Semiconductor MC100EP56DT MC100EP56DTR2
MUX SELECT TRUTH TABLE
SEL0 X L L H H SEL1 X L H H L COM_SEL H L L L L Q0, /Q0 a b b a a Q1, /Q1 a b a a b
ECL Pro is a trademark of Micrel, Inc. M9999-120505 hbwhelp@micrel.com or (408) 955-1690
Rev.: D Amendment: /0
1
Issue Date: December 2005
Micrel, Inc.
ECL ProTM SY100EP56V
PACKAGE/ORDERING INFORMATION
D0a /D0a VBB0 D0b /D0b D1a /D1a VBB1 D1b 1 2 3 0 4 5 6 7 8 0 9 12 /Q1 11 VEE /D1b 10 1 17 SEL0 16 COM_SEL 15 SEL1 14 VCC 13 Q1 1 20 VCC 19 Q0 18 /Q0
Ordering Information(1)
Part Number SY100EP56VK4I SY100EP56VK4ITR(2) SY100EP56VK4G(3) SY100EP56VK4GTR(2, 3) Package Type K4-20-1 K4-20-1 K4-20-1 K4-20-1 Operating Range Industrial Industrial Industrial Industrial Package Marking XEP56V XEP56V Lead Finish Sn-Pb Sn-Pb
XEP56V with Pb-Free Pb-Free bar-line indicator NiPdAu XEP56V with Pb-Free Pb-Free bar-line indicator NiPdAu
Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25C, DC Electricals only. 2. Tape and Reel. 3. Pb-Free package is recommended for new designs.
20-Pin TSSOP (K4-20-1)
PIN DESCRIPTION
Pin D0a, /D0a D0b, /D0b Pin Number 1, 2, 4, 5 Function Channel 0 PECL/ECL differential signal inputs. Multiplexing of these two differential inputs is controlled by SEL0, or COM_SEL. The signal inputs include internal 75k pull-down resistors. Default condition is LOW when left floating. The input signal should be terminated externally. See "Termination" section Channel 1 PECL/ECL differential signal inputs. Multiplexing of these two differential inputs is controlled by SEL1, or COM_SEL. The signal inputs include internal 75k pull-down resistors. Default condition is a logic LOW when left floating. The input signal should be terminated externally. See "Termination" section Channel 0 and Channel 1 reference output voltage. This reference is typically used to bias the unused inverting input for single-ended input applications, or as the termination point for AC- coupled differential input applications. VBB reference value is approximately VCC -1.4V, and tracks VCC 1:1. Maximum sink/source capability is 0.50mA. For single ended PECL inputs, connect to the unused input through a 50 resistor. Decouple the VBB pin with a 0.01F capacitor. For PECL/ LVPECL inputs, the decoupling capacitor is connected to VCC, since PECL signals are referenced to VCC. Leave floating if not used. Negative Power Supply: For PECL/LVPECL applications, connect to GND. Channel 1 100KEP PECL/ECL compatible differential output. PECL/ECL termination is with a 50 resistor to VCC-2V. Unused output pairs may be left floating. Unused single-ended outputs must have a balanced load. For AC-coupled applications, the output stage emitter follower must have a DC current path to ground. See "Termination" section. 100KEP PECL/ECL compatible Channel 1 and Channel 0 MUX select control. See "MUX Select Truth Table." Each pin includes an internal 75k pull-down resistor. Default condition when left floating is LOW. 100KEP PECL/ECL compatible Channel 1 and Channel 0 Common MUX select control. This is the common select control pin for both Channels 0 and 1. Includes an internal 75k pull-down resistor. Default condition when left floating is LOW. Leave floating when not used. Channel 0 100K EP PECL/ECL compatible differential output. PECL/ECL termination is with a 50 resistor to VCC -2V. Unused output pairs may be left floating. Unused single-ended outputs must have a balanced load. For AC-coupled applications, the output stage emitter follower must have a DC current path to ground. See "Termination" section. Positive Power Supply: Both VCC pins must be connected to the same power supply externally. Bypass with 0.1F//0.01F low ESR capacitors. 2
D1a, /D1a D1b, /D1b
6, 7 9, 10
VBB0, VBB1
3, 8
VEE /Q1, Q1
11 12, 13
SEL1, SEL0
15, 17
COM_SEL
16
/Q0, Q0
18, 19
VCC
14, 20
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Micrel, Inc.
ECL ProTM SY100EP56V
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VCC -- VEE VIN IOUT IBB TLEAD TA Tstore JA Power Supply Voltage Input Voltage (VCC = 0V, VIN not more negative than VEE) Input Voltage (VEE = 0V, VIN not more positive than VCC) Output Current VBB Sink/Source Current(2) Lead Temperature (soldering, 20sec.) Operating Temperature Range Storage Temperature Range Package Thermal Resistance (Junction-to-Ambient) Package Thermal Resistance (Junction-to-Case) -Still-Air (single-layer PCB) -Still-Air (multi-layer PCB) -500lfpm (multi-layer PCB) -Continuous -Surge Rating Value 6.0 -6.0 to 0 +6.0 to 0 50 100 0.5 +260 -40 to +85 -65 to +150 115 75 65 21 Unit V V V mA mA C C C C/W
JC
Notes:
C/W
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratlng conditions for extended periods may affect device reliability. 2. Due to the limited drive capability, the VBB reference should only be used for inputs from the same package device (i.e., do not use for other devices).
DC ELECTRICAL CHARACTERISTICS(1)
TA = -40C Symbol VCC Parameter Power Supply Voltage (PECL) (LVPECL) (ECL) (LVECL) Supply Current Input HIGH Current Input LOW Current All Inputs CIN
Note: 1. 100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained.
TA = +25C Min. 4.5 3.0 -5.5 -3.8 -- -- 0.5 -- Typ. 5.0 3.3 -5.0 -3.3 50 -- -- 1.0 Max. 5.5 3.8 -4.5 -3.0 65 150 -- -- Min. 4.5 3.0 -5.5 -3.8 -- -- 0.5 --
TA = +85C Typ. 5.0 3.3 -5.0 -3.3 50 -- -- -- Max. 5.5 3.8 -4.5 -3.0 65 150 -- -- mA A A pF No Load VIN = VIH VIN = VIL Unit V Condition
Min. 4.5 3.0 -5.5 -3.8 -- -- 0.5 --
Typ. 5.0 3.3 -5.0 -3.3 50 -- -- --
Max. 5.5 3.8 -4.5 -3.0 65 150 -- --
IEE IIH IIL
Input Capacitance (TSSOP)
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Micrel, Inc.
ECL ProTM SY100EP56V
(100KEP) LVPECL DC ELECTRICAL CHARACTERISTICS(1)
VCC = 3.3V 10%, VEE = 0V
TA = -40C Symbol VIL VIH VOL VOH VBB VIHCMR
Notes: 1. 100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output parameters are at VCC = 3.3V. They vary 1:1 with VCC. 2. The VIHCMR range is referenced to the most positive side of the differential input signal.
TA = +25C Max. 1675 2420 1605 2405 1975 VCC Min. 1355 2075 1355 2155 1775 2.0 Typ. -- -- 1480 2280 1875 -- Max. 1675 2420 1605 2405 1975 VCC Min. 1355 2075 1355 2155 1775 2.0
TA = +85C Typ. -- -- 1480 2280 1875 -- Max. 1675 2420 1605 2405 1975 VCC Unit mV mV mV 50 to VCC-2V mV 50 to VCC-2V mV V Condition
Parameter Input LOW Voltage (Single-Ended) Input HIGH Voltage (Single-Ended) Outuput LOW Voltage Output HIGH Voltage Output Reference Voltage Input HIGH Common Mode Range Voltage(2)
Min. 1355 2075 1355 2155 1775 2.0
Typ. -- -- 1480 2280 1875 --
(100KEP) PECL DC ELECTRICAL CHARACTERISTICS(1)
VCC = 5.0V 10%, VEE = 0V
TA = -40C Symbol VIL VIH VOL VOH VBB VIHCMR
Notes: 1. 100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output parameters are at VCC = 5.0V. They vary 1:1 with VCC. 2. The VIHCMR range is referenced to the most positive side of the differential input signal.
TA = +25C Max. 3375 4120 3305 4105 3675 VCC Min. 3055 3775 3055 3855 3475 2.0 Typ. -- -- 3180 3980 3575 -- Max. 3375 4120 3305 4105 3675 VCC Min. 3055 3775 3055 3855 3475 2.0
TA = +85C Typ. -- -- 3180 3980 3575 -- Max. 3375 4120 3305 4105 3675 VCC Unit mV mV mV 50 to VCC-2V mV 50 to VCC-2V mV V Condition
Parameter Input LOW Voltage (Single-Ended) Input HIGH Voltage (Single-Ended) Outuput LOW Voltage Output HIGH Voltage Output Reference Voltage Input HIGH Voltage(2) Common Mode Range
Min. 3055 3775 3055 3855 3475 2.0
Typ. -- -- 3180 3980 3575 --
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Micrel, Inc.
ECL ProTM SY100EP56V
(100KEP) ECL/LVECL DC ELECTRICAL CHARACTERISTICS(1)
VCC = 0V, VEE = -5.5V to -3.0V
TA = -40C Symbol VIL VIH VOL VOH VBB VIHCMR
Notes: 1. 100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. 2. The VIHCMR range is referenced to the most positive side of the differential input signal.
TA = +25C Max. Min. Typ. -- -- Max. Min.
TA = +85C Typ. -- -- Max. -1625 -880 Unit mV mV mV 50 to VCC-2V mV 50 to VCC-2V mV V Condition
Parameter Input LOW Voltage Input HIGH Voltage Outuput LOW Voltage Output HIGH Voltage Output Reference Voltage Input HIGH Common Mode Range Voltage(2)
Min. -1945 -1225
Typ. -- --
-1625 -1945 -880 -1225
-1625 -1945 -880 -1225
-1945 -1820 -1695 -1945 -1820 -1695 -1945 -1820 -1695 -1145 -1020 -895 -1145 -1020 -895 -1145 -1020 -895
-1525 -1425 -1325 -1525 -1425 -1325 -1525 -1425 -1325 VEE +2.0 0.0 VEE +2.0 0.0 VEE +2.0 0.0
AC ELECTRICAL CHARACTERISTICS
VCC = 0V; VEE = -3.0V to -5.5V or VCC = 3.0V to 5.5V, VEE = 0V
TA = -40C Symbol fMAX tPLH tPHL Parameter Max. Toggle Frequency(1) Min. 3 230 250 250 -- -- -- -- -- -- 150 -- Typ. -- 290 300 350 50 -- 0.2 -- -- -- 800 120 Max. -- 450 450 450 100 200 <1 -- -- -- 1200 170 Min. 3 230 250 250 -- -- -- -- -- -- 150 -- TA = +25C Typ. -- 290 320 360 50 -- 0.2 <1 <25 <50 800 130 Max. -- 470 470 470 100 200 <1 -- -- -- 1200 180 Min. 3 230 250 250 -- -- -- -- -- -- 150 -- TA = +85C Typ. -- 300 330 400 50 -- 0.2 -- -- -- 800 150 Max. -- 500 500 500 100 200 <1 -- -- -- 1200 230 Unit GHz ps ps ps ps ps ps rms ps rms pspk-pk mV ps Note 3 Note 4 Condition
Propagation Delay (Differential) D to Q, /Q SEL to Q, /Q COM_SEL to Q, /Q Within-Device Skew(2) Q, /Q Part-to-Part Skew(2)
tSKEW tJITTER
Cycle-to-Cycle Jitter (rms) Random Jitter Deterministic Jitter @1.25Gbps @2.5Gbps
VDIFF tr, tf
Notes:
Input Voltage (Differential) Output Rise/Fall Time Q, /Q (20% to 80%)
1. Measured with 750mV input signal, 50% duty cycle. Output swing 400mV. All loading with a 50 to VCC -2.0V. 2. Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs. 3. RJ is measured with a K28.7 comma detect character pattern, measured at 1.25Gbps and 2.5Gbps. 4. DJ is measured at 1.25Gbps and 2.5Gbps, with both K28.5 and 223-1 PRBS pattern.
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Micrel, Inc.
ECL ProTM SY100EP56V
TYPICAL OPERATING CHARACTERISTICS
VCC = 3.3V, VEE = GND, TA = 25C, unless otherwise stated.
Output Amplitude vs. Frequency
900
Propagation Delay vs. Temperature
360
PROPAGATION DELAY (ps)
OUTPUT AMPLITUDE (mV)
800 700 600 500 400 300 200 100 0 TA = 25C VCC = 3.3V VIN = 800mV
350 340 330 320 310 300 290
TA = 25C VCC = 3.3V VIN = 800mV
1000
1500
2000
2500
3000
3500
4000
500
FREQUENCY (MHz)
500MHz Output
TA = 25C VCC = 3.3V VEE GND VIN = 800mV Output Swing (200mV/div.) Output Swing (200mV/div.) /Q /Q TA = 25C VCC = 3.3V VEE GND VIN = 800mV
Q
Q
TIME (300ps/div.)
2.5GHz Output
TA = 25C VCC = 3.3V VEE GND VIN = 800mV Output Swing (200mV/div.) /Q Output Swing (200mV/div.) TA = 25C VCC = 3.3V VEE GND VIN = 800mV /Q Q
Q
TIME (60ps/div.)
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-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90
280
TEMPERATURE (C)
1.5GHz Output
TIME (100ps/div.)
3.0GHz Output
TIME (55ps/div.)
Micrel, Inc.
ECL ProTM SY100EP56V
TERMINATION RECOMMENDATIONS
+3.3V
+3.3V
ZO = 50 ZO = 50
R1 130
R1 130
+3.3V
R2 82
R2 82
Vt = VCC --2V
Figure 1. Parallel Termination-Thevenin Equivalent
Note: 1. For +5.0V systems: R1 = 82, R2 = 130.
+3.3V
Z = 50 Z = 50 50 50
+3.3V
source 50 Rb
destination C1 (optional) 0.01F
Figure 2. Three-Resistor "Y-Termination"
Notes: 1. Power-saving alternative to Thevenin termination. 2. Place termination resistors as close to destination inputs as possible. 3. Rb resistor sets the DC bias voltage, equal to Vt. For +3.3V systems Rb = 46 to 50. For +5V systems, Rb = 110.
+3.3V R1 130 ZO = 50
+3.3V R1 130 50
+3.3V
Q
+3.3V
/Q Vt = VCC --2V R2 82 R2 82 0.01F +3.3V
VBB
Figure 3. Terminating Unused I/O
Notes: 1. Unused output (/Q) must be terminated to balance the output. 2. Micrel's differential I/O logic devices include a VBB reference pin . 3. Connect unused input through 50 to VBB. Bypass with a 0.01F capacitor to VCC, not GND, as PECL is referenced to VCC. 4. For +2.5V systems: R1 = 250, R2 = 62.5. M9999-120505 hbwhelp@micrel.com or (408) 955-1690
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Micrel, Inc.
ECL ProTM SY100EP56V
20-PIN TSSOP (K4-20-1)
.10 .004
.05 0.002 + .10 - .00 + .004 - .000
.10 .004
+ .10 - .00 + .004 - .000
Rev. 01
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TEL
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FAX
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WEB
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The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2005 Micrel, Incorporated. M9999-120505 hbwhelp@micrel.com or (408) 955-1690
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